In preparation for fabricating hybrid ICs, scientists Gianfranco Cerofolini and Danilo Mascolo from STMicroelectronics in Italy have analyzed the current state of the required technologies. They then defined and generated solutions for the greatest challenges, and predicted the most successful route to mass fabrication of hybrids for nonvolatile memories (which is memory that can be stored even after power is turned off, e.g. flash).
“We have proposed an architecture allowing the mass scale production of hybrid ICs on the 0.1 Tbit [trillion] integration scale,” wrote the team in a recent issue of
Semicounductor Science & Technology. “All solutions to factors limiting the development of the technology require the adaptation of already existing technologies to the proposed architecture.”
In their hybrid set-up, the scientists start with a microelectronic silicon part, which controls a nano crossbar, where each cross point hosts up to 10,000 molecules – hence, a “micro-nano-mole IC.” It’s the individual molecules that act as memory devices, as they can have two different electrically conductive states (low and high) which code the bits. A molecule captures an electron, causing a current to save the state by switching off writing potential. To erase, the captured electron can be forced to tunnel away. (Electron tunneling, an effect of quantum mechanics, occurs due to the wavelike nature of electrons, enabling the particles to “tunnel” across a forbidden zone and emerge in a different position, not actually having been in between.)
“These hypothesized molecules are able to mimic the structure and functioning of a flash memory cell,” the team wrote. “If the molecule admits two electronic states characterized by largely different conductivity … the whole structure may be viewed as a hybrid nano-micro IC with bit density of the order of 10
11 cm
-2.”
The challenges that Cerofolini and Mascolo identified generally revolve around two aspects: production cost and scalability. In the IC industry, money is spent on the front side of the process: if you can design the architecture for a sufficiently small (i.e. dense) chip at a feasible assembly cost, there will be enough uses (computers, cell phones, PDAs, etc.) that profits will more than make up for design costs.
As the team wrote, their first major problem they face is “the set-up of economically sustainable technology for the preparation of 10
11 cross-points cm
-2.” For problems such as synthesizing and grafting the molecules, as well as organizing the writing linkages in the microelectronic circuit, the scientists offered low-cost solutions (e.g. using self-alignment rather than expensive electron beam lithography) to achieve the necessary scaling.
Considering the number of parts on a chip – 10 billion bits, 200,000 wires, 256 sense amplifiers and ten million transistors occupy each crossbar of area 2.5 square cm – such scaling is no small feat (figuratively speaking, at least). Although other questions – such as reliability of the molecules –would require further specifications, Cerofolini and Mascolo conclude that micro-nano-mole ICs have potential.
“That ‘potential’ does indeed transform into ‘practical’ requires that the techniques of deposition, oxidation and anisotropic etching be integrated in a cluster tool permitting the repetition of the unit cycle in a relatively short time,” the scientists wrote. “…and that the chemical, rheological, etc. properties that are observed on the submicrometer length scale continue to hold true on the nanometer length scale.”
Citation: Cerofolini, G. and Mascolo, D. “A hybrid micro-nano-molecular route for nonvolatile memories.”
Semiconductor Science & Technology. 21 (2006). 1315-1325.
By Lisa Zyga, Copyright 2006 PhysOrg.com
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