Albany NanoTech Pioneers 193nm Immersion Lithography R&D with ASML, IBM, TEL, AMD and Infineon

Albany NanoTech of the University at Albany-State University of New York announced today that its College for Nanoscale Science and Engineering (CSNE) has installed and begun qualifying for 300mm wafers using the world’s first 193nm pre-production immersion lithography system.

The activity brings together worldwide technical expertise and state-of-the-art resources in immersion lithography science and technology from ASML, IBM, and Tokyo Electron Limited (TEL) to the ever expanding 300mm wafer nanotechnology R&D complexes of Albany NanoTech, further establishing it as one of the most advanced university complex in the world.

"ASML’s early lead in immersion is due to the company’s commitment to technology leadership. Our development strategy puts ASML’s first testing tools in the hands of customers to speed the proliferation of immersion technology," said Martin van den Brink, Executive Vice President, Marketing and Technology, ASML. "This alliance with Albany Nanotech and CNSE allows us to innovate with existing customers AMD, IBM and Infineon as well as business collaborator TEL within a world-class university research complex. In the future, the introduction of new technologies will require this type of early collaboration. Teamwork drives equipment suppliers to deliver total solutions and customers to deliver complete equipment applications."

"The technology and expertise from ASML and TEL combined with the research know-how of IBM represent a critical milestone in enhancing Albany NanoTech’s status as an international leader in nanotechnology development and education. Resulting industry-university programs will play a significant role in the strong lithography programs at CNSE, ensuring an unparalleled research capability that will provide immediate scientific and technical solutions to our semiconductor industry customers," said Alain E. Kaloyeros, Ph.D., Vice President and Chief Administrative Officer of CSNE, and professor of nanoscience at UAlbany. "This achievement was made possible through the support of Governor Pataki, Speaker Silver, and Senator Bruno and their ongoing investments in New York’s high-tech economy"


Recent research has moved immersion lithography to the forefront of the semiconductor industry as a promising, next generation technology. It requires the gap between the lens of the exposure tool and the silicon wafer to be filled with a liquid, such as water, instead of air, to enhance resolution performance. The market for immersion lithography tools is projected to go from zero to US$ 230 million by 2005, according to industry analysts.

"CNSE’s acquisition and rapid installation of the pre-production 193nm immersion system is an impressive industry first and demonstrates the continued commitment of Albany NanoTech and New York State to its industrial partners," said Dr. John E. Kelly III, senior vice president, technology, IBM Systems and Technology Group. "This achievement will provide the early learning to enable continued leadership in the development of future nanoelectronic devices."

Under the program, researchers and engineers from CNSE, ASML, IBM and TEL will work jointly on site at Albany NanoTech to demonstrate and optimize materials and processes for emerging 193nm immersion lithography on a clustered 300mm wafer scanner-track platform. The integrated platform consists of two components: the ASML TWINSCAN™ AT:1150i scanner, and a Tokyo Electron Limited (TEL) CLEAN TRACK LITHIUS™ coater/developer system.

The collaboration between business, higher education and government at CSNE has created an epicenter of nanoelectronics research which is attracting unprecedented investment and cooperation, as well as providing an environment in which the partners receive early access to some of the most advanced semiconductor tools and equipment available today. As part of their ongoing work with the CNSE, AMD and Infineon also will work with IBM and CNSE in the use of the AT:1150i for the development of immersion lithography processes and applications.

"AMD is committed to pioneering research in immersion lithography, so we’re excited to see the first 193 nm immersion lithography system installed at Albany NanoTech," said Dr. David Kyser, Director of External Research at Advanced Micro Devices. "AMD scientists are already working closely with scientists at the College of Nanoscale Science and Engineering, and the addition of leading-edge tools can only enhance our already fruitful engagement."

"Putting the first pre-production 193nm immersion lithography system at Albany NanoTech enables nanoelectronics innovators like Infineon to advance their leading-edge R&D programs more efficiently, ultimately benefiting our customers and the industry as a whole," said Wilhelm Beinvogl, CTO Memory Products Group at Infineon. "This new tool is a significant addition to Albany NanoTech’s already extensive lithography research infrastructure with participation of a sizable Infineon engineering group."

Albany NanoTech complex, as the home of CNSE and the New York State Center for Excellence, enables programs that cover the entire spectrum of nanoelectronics industry needs, from long-term innovative research and development, to workforce education and development, to product prototyping and commercialization. The Center for Excellence in Nanoelectronics is supported by investments from New York State and the IBM Corporation. Albany NanoTech also hosts the research facilities for International Sematech North R&D Center and the Tokyo Electron Limited Technology Center America.

Source: ASML

Related stories:

AMD, Partners Produce Test Chip Using EUV Lithography
AMD, working together with its research partner, IBM, announced it has produced a working test chip utilizing Extreme Ultra-Violet (EUV) lithography for the critical first layer of metal connections across the entire chip.
AMD and IBM Detail Early Results Using Immersion and Ultra Low-K in 45nm Chips
At the International Electron Device Meeting today, IBM and AMD presented papers describing the use of immersion lithography, ultra-low-K interconnect dielectrics, and multiple enhanced transistor strain techniques for application to the 45nm microprocessor process generation. AMD and IBM expect the first 45nm products using immersion lithography and ultra-low-K interconnect dielectrics to be available in mid-2008.
Sematech Advances Feasibility of 193 nm Immersion Lithography for 45 nm
Sematech researchers have successfully used 193 nm immersion technology (193i) at 1.3 numerical aperture (NA) with azimuthal polarization to pattern features narrower than 45 nm half-pitch in multiple orientations simultaneously. Azimuthal polarization allows for aggressive imaging of arbitrary circuit features beyond simple line-and-space test patterns.
ASML Impacts Industry Roadmap with Immersion and EUV Achievements for 45 nm and Beyond
ASML Holding NV today announced significant progress towards development of both high NA immersion and Extreme Ultra Violet (EUV) lithography technology: two critical elements of the semiconductor industry’s ability to continue its historical trend of packing more power onto silicon chips.
Nano World: A semiconductor nanotools boom
Semiconductor industry tools and instruments that work on the nanoscale could form a $5.5 billion market by 2012, experts told UPI's Nano World.
2005 ITRS Meeting Assesses the IC Industry’s Rapid Advance into Nanotech
The advanced chip industry is moving rapidly into nanotechnology, a trend that will be presented by global experts at next week’s 2005 ITRS Public Conference of the draft 2005 International Technology Roadmap for Semiconductors (ITRS).
ASML Ships TWINSCAN XT:1900i Lithography System for Volume Production
ASML today announced that it has shipped its first TWINSCAN XT:1900i, the world’s only lithography system capable of imaging features down to 36.5 nanometers (nm) on chips manufactured in volume. Production of the XT:1900i is now ramping up fast, as multiple orders have been placed and systems will be shipped before the end of this year to many of the world’s leading device makers.
IMEC advancing state-of-the-art in FinFETs
At this week’s VLSI Symposium, IMEC presents significant progress in the manufacturability, circuit performance and reliability of FinFETs. The results advance FinFET process technology towards being a candidate for the 32nm node and beyond.

News discussion:

Technology news