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Breakthrough Computer Chip Lithography Method Developed at RIT

Feb 10 ,Technology



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A new computer chip lithography method under development at Rochester Institute of Technology has led to imaging capabilities beyond that previously thought possible.

Leading a team of engineering students, Bruce Smith, RIT professor of microelectronic engineering and director of the Center for Nanolithography Research in the Kate Gleason College of Engineering, developed a method—known as evanescent wave lithography, or EWL—capable of optically imaging the smallest-ever semiconductor device geometry. Yongfa Fan, a doctoral student in RIT’s microsystems engineering Ph.D. program, accomplished imaging rendered to 26 nanometers —a size previously possible only via extreme ultraviolet wavelength, Smith says. By capturing images that are beyond the limits of classical physics, the breakthrough has allowed resolution to smaller than one-twentieth the wavelength of visible light, he adds.

The development comes at least five years sooner than anticipated, using the International Technology Roadmap for Semiconductors (http://public.itrs.net) as a guide, Smith says. The roadmap, created by a consortium of industry groups, government organizations, universities, manufacturers and suppliers, assesses semiconductor technology requirements to ensure advancements in the performance of integrated circuits to meet future needs.

“Immersion lithography has pushed the limits of optical imaging,” Smith says. “Evanescent wave lithography continues to extend this reach well into the future. The results are very exciting as images can be formed that are not supposed to exist.”

Evanescent wave lithography is an “enabling technology” permitting better understanding of how building blocks are created for future microelectronic and nanotechnology devices—the technology that consumers will use over the next five to 10 years, Smith explains.

Smith will present research at Microlithography 2006, a symposium sponsored by the International Society for Optical Engineering, on Feb. 22, in San Jose, Calif.

Source: Rochester Institute of Technology

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