Toshiba Corporation today announced a new three dimensional memory cell array structure that enhances cell density and data capacity without relying on advances in process technology, and with minimal increase in the chip die size. In the new structure, pillars of stacked memory elements pass vertically through multi-stacked layers of electrode material and utilize shared peripheral circuits. The innovative design is a potential candidate technology for meeting future demand for higher density NAND flash memory.
Typically, advances in memory density reflect advances in process technology. Toshiba’s new approach is based on innovations in the stacking process. Existing memory stacking technologies simply stack two-dimensional memory array on top of another, repeating the same set of processes.
While this achieves increased memory cell density, it makes the manufacturing process longer and more complex. The new array does increase memory cell density, is easier to fabricate, and does not produce much increase in chip area, as peripheral circuits are shared by several silicon pillars.
Toshiba’s cutting edge etching technology drives a through-hole down through a stacked substrate, i.e. a multi-layer sandwich of gate electrodes and insulator films. Pillars of silicon lightly doped with impurities are deposited to fill in the holes. The gate electrode wraps around the silicon pillar at even intervals, and a pre-formed nitride film for data-retention, set in each joint, functions as a NAND cell.
Toshiba's new method has a SONOS structure-- silicon-oxide-nitride-oxide- silicon --and the electrical charge is held in the silicon-nitride film, which is formed inside gate holes. Traps are formed to lock the electrical charge inside the silicon-nitride film.
NAND flash memory functions through batch processing of cells, in large numbers of elements connected in series. Toshiba’s new array increases density without increasing chip dimension, as the number of connected elements increases in direct proportion to stack height. For example, a 32-layer stack realizes 10 times the integration of a standard chip formed with the same generation of technology.
Toshiba will further develop this elemental technology to the level where it matches current structures in terms of security and reliability.
This announcement was presented in the VLSI symposium on June 12.
Source: Toshiba
Related stories:
Samsung Introduces High-performance, Low-density, SATA II SSDs
Samsung Electronics announced today that it has begun sampling low-density, higher-performance solid state drives (SSDs) that are only 30 percent of the size of 2.5-inch SSDs and highly cost-efficient to manufacture. With the introduction of these smaller, low-capacity SSDs, Samsung now offers an attractive replacement for existing hard drives used in low-cost PCs. Available in densities of 8GB, 16GB and 32GB, the new multi-level-cell SSDs will be mass produced beginning next month.
Samsung Introduces Software to Increase Efficiency of Embedded Memory Solutions for Smart Phones
Samsung Electronics, the world leader in advanced semiconductor technology, announced today that it is introducing software designed to optimize the high performance features of its proprietary embedded flash memories: OneNAND, Flex-OneNAND and moviNAND, in smart phones, using the major mobile operating systems – Windows Mobile(CE), Symbian, Linux, and RTOS (real-time operating system).
Toshiba Launches the Largest Density Embedded NAND Flash Memory Devices
Toshiba Corporation today announced the launch of 32GB embedded NAND flash memory modules that offer the largest density yet announced plus full compliance with the e-MMC and eSD standards. The embedded devices are designed for application in mobile digital consumer products, including mobile phones and video cameras. Samples will be available in September 2008, and mass production will start in the fourth quarter.
Elpida Ready to Launch World's Largest Capacity (16-Gigabyte) FB-DIMM
Elpida Memory, Japan's leading global supplier of Dynamic Random Access Memory (DRAM), announced today that it is ready to launch 16-gigabyte Fully Buffered DIMM (FB-DIMM), the world's largest capacity FB-DIMM. Based on its own unique integrated packaging technology (stacked FBGA or sFBGA) with 2-gigabit DDR2 SDRAM Elpida has achieved development of FB-DIMM products that feature an ultra thin thickness of 7.7mm along with the world's largest capacity of 16 gigabytes.
UMC's Embedded DRAM, URAM Proven in 65nm Customer Silicon
UMC, a leading global semiconductor foundry, today announced that it has produced functional 65nm customer products incorporating URAM, the company's patented embedded DRAM (eDRAM) technology.
Giant memory thanks to tiny capacitors
German-Korean research team produces a permanent memory using a new procedure and thereby sets a memory density record.
AMD Stream Processor First to Break 1 Teraflop Barrier
At the International Supercomputing Conference, AMD today introduced its next-generation stream processor, the AMD FireStream 9250, specifically designed to accelerate critical algorithms in high-performance computing (HPC), mainstream and consumer applications.
Samsung Introduces 90-Nanometer High Performance Smart Card IC
Samsung Electronics Co., Ltd., a leader in advanced semiconductor technology, announced today its 90-nanometer smart card IC with high data storage capacity for subscriber identity module (SIM) cards and mobile TV applications.
