Sematech engineers have identified metal electrode materials that can be used to build reliable nMOS transistors with high‑k dielectric – a major milestone in the quest to fabricate working CMOS devices using metal gate and high-k dielectric stacks.
In recent years, the semiconductor industry has struggled with high gate leakage current and the limited scalability of SiO
2 gate dielectrics. While high-k dielectrics were seen as an alternative, it has proven very difficult to find metal electrode materials to replace n- and p-type doped polysilicon gates.
In many cases, metal electrode materials showing workfunctions close to n+ or p+ type doped polysilicon gates reverted to unusable mid-gap workfunctions after going through CMOS device processing. That’s because the effective workfunction of metal electrodes is affected by several factors, including composition, underlying dielectric and heat cycles. Thus, the fabrication of metal-oxide semiconductor field-effect transistors (MOSFETs) with metal gates comparable to polysilicon gate MOSFETs has remained a huge challenge to industry researchers.
The accomplishment, involving nMOSFETs with metal electrodes showing an effective workfunction close to ~4.0eV, caps a three-year project involving nearly 40 engineers at Sematech and collaborating universities and suppliers. Technical details will be shared during the 2006 Symposium on VLSI Technology, scheduled June 13-15 in Honolulu, Hawaii.
“We systematically screened more than 250 material systems on various dielectrics,” said Byoung Hun Lee, manager of the Advanced Gate Stack Program in Sematech’s Front End Processes (FEP) Division. “From this work, we developed an understanding of how metal electrode materials and high-k dielectrics react, and how the effective workfunction of metal electrodes can be controlled to yield an effective workfunction close to that of doped polysilicon gates.”
Lee added, “Our approach will enable the industry to implement metal electrodes with minimum modifications to current CMOS process flow.”
Sematech’s progress on nMOSFET metal electrode technology comes on the heels of last year’s related breakthroughs in channel mobility and reliability of high-k metal gate transistors (
http://www.sematech.org/corporate/news/releases/20050425.htm). That FEP work involved a halfnium silicate (HfSiO) dielectric with an equivalent oxide thickness (EOT) of roughly 10 angstroms (Å) with a metal gate, achieving mobility of 90 percent of the universal mobility curve for SiO
2.
“These potential solutions for metal gate nMOSFETs bring high-k technology to a more practical realm,” said FEP Director Rajarao Jammy. He said key data and process details will be provided to Sematech members, and some details of the material systems for nMOSFET will be presented at upcoming technical conferences to promote consensus and additional research from industry and academia.
Source: Sematech
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